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• W2243075184 abstract "This paper discusses design and measurements ofa flexible Viterbi decoder fabricated in 130-nm digital CMOS.Flexibility was incorporated by providing various code rates andmodulation schemes to adjust to varying channel conditions.Based on previous trade-off studies, flexible building blocks werecarefully designed to cause as little area penalty as possible. Thechip runs down to a minimal core supply of 0.8V. It turns out thatstriving for more modulation schemes is beneficial in terms ofpower consumption once the price is paid for accepting differentcode rates viz. radices in the trellis and survivor path units." @default.
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• W2243075184 date "2008-01-01" @default.
• W2243075184 modified "2023-09-26" @default.
• W2243075184 title "A variable-rate Viterbi decoder in 130-nm CMOS: design, measurements, and cost of flexibility" @default.
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