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- W2247318612 abstract "High-Efficiency Video Coding (HEVC) is planned to bethe successor video standard to the popular Advanced Video Coding(H.264/AVC) with a targeted 2x improvement in compression at thesame quality. This improvement comes at the cost of increasedcomplexity through the addition of new coding tools and increasedcomputation in existing tools. The ever-increasing demand forhigher resolution video further adds to the computation cost. Inthis work, digital circuits for two HEVC tools - inverse transformand deblocking filter are implemented to support Quad-Full HD (4K x2K) video decoding at 30fps. Techniques to reduce power and areacost are investigated and synthesis results in 40nm CMOS technologyand Virtex-6 FPGA platform are presented." @default.
- W2247318612 created "2016-06-24" @default.
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- W2247318612 date "2012-01-01" @default.
- W2247318612 modified "2023-09-26" @default.
- W2247318612 title "Circuit implementations for high-efficiency video coding tools" @default.
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