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- W2258914175 abstract "An on-chip waveform monitoring technique embodies in-stack evaluation of three-dimensional integrated circuits (3D IC) regarding physical connections using through silicon vias (TSV) and electronic characteristics of signal transmission as well as noise propagation. On-chip generation of reference voltage steps and sampling timings reduces the complexity of analog signal routing in a chip stack and enhances measurement throughputs. The demonstrated 7.6 effective bit resolution with a 5.8 times higher throughput is suitable for in-stack monitoring. Sinusoidal signal transmission in a two-tier 3D IC is on-chip evaluated." @default.
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- W2258914175 date "2014-05-12" @default.
- W2258914175 modified "2023-09-24" @default.
- W2258914175 title "In-stack monitoring of signal and power nodes in three dimensional integrated circuits" @default.
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