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- W2267001299 abstract "Phase-locked-loops (PLL) have been employed in high-speed data transmission systems like wireless transceivers, disk read/write channels and high-speed interfaces. The majority of the researchers use a charge pump (CP) to obtain high performance from PLLs. This paper presents a review of various CMOS CP schemes that have been implemented for PLLs and the relationship between the CP parameters with PLL performance. The CP architecture is evaluated by its current matching, charge sharing, voltage output range, linearity and power consumption characteristics. This review shows that the CP has significant impact on the quality performance of CP PLLs." @default.
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- W2267001299 date "2015-10-25" @default.
- W2267001299 modified "2023-10-16" @default.
- W2267001299 title "High Performance CMOS Charge Pumps for Phase-locked Loop" @default.
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- W2267001299 doi "https://doi.org/10.4313/teem.2015.16.5.241" @default.
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