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• W2275520256 abstract "Reducing energy consumption is a challenge that is faced on a daily basis by teams from the high-performance computing as well as the embedded domains. This issue is mostly approached from an hardware perspective by devising architectures that put energy efficiency as a primary target, often at the cost of processing power. Lately, computing platforms have become more and more heterogeneous, but the exploitation of these additional capabilities is so complex from the application developer's perspective that their optimization is often limited. In this paper we present a transparent, on-the-fly optimization scheme that allows a generic application to automatically and dynamically exploit the available computing units to partition its computational load. We have called our approach Heterogeneous Platform Accelerator (HPA). The idea is to use profiling to select a computing-intensive candidate for acceleration, and then distribute the computations to the different units by off-loading blocks of code to them. This is done automatically at run-time, thus requiring no effort from the developer and adapting to the current input data and load. Using an NVIDIA Jetson TK1 board, we validate our proposal on several benchmarks and on a real-world software package, the Unix text editor ed. The results we achieve substantiate our claim that not only HPA results in faster processing speed, but also in a considerable reduction in energy dissipation." @default.
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• W2275520256 date "2016-07-01" @default.
• W2275520256 modified "2023-09-23" @default.
• W2275520256 title "HPA: An opportunistic approach to embedded energy efficiency" @default.
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• W2275520256 doi "https://doi.org/10.1109/hpcsim.2016.7568415" @default.
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