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- W2292298797 abstract "In this paper, we present an optimized design method for high-speed embedded image processing system using 32 bit floating-point Digital Signal Processor (DSP) and Complex Programmable Logic Device (CPLD). The DSP acts as the main processor of the system: executes digital image processing algorithms and operates other devices such as image sensor and CPLD. The CPLD is used to acquire images and achieve complex logic control of the whole system. Some key technologies are introduced to enhance the performance of our system. In particular, the use of DSP/BIOS tool to develop DSP applications makes our program run much more efficiently. As a result, this system can provide an excellent computing platform not only for executing complex image processing algorithms, but also for other digital signal processing or multi-channel data collection by choosing different sensors or Analog-to-Digital (A/D) converters." @default.
- W2292298797 created "2016-06-24" @default.
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- W2292298797 date "2006-01-01" @default.
- W2292298797 modified "2023-09-28" @default.
- W2292298797 title "A Versatile High-speed Image Processing System Based on DSP and CPLD" @default.
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- W2292298797 hasPublicationYear "2006" @default.
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