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- W2295079892 abstract "Delay variations are typically accounted for by increasing cycle time margins. Adaptive synchronization eliminates this on inter-modular interfaces in very large, high performance chips. The chip is divided into multiple smaller synchronous modules. Multi-synchronous hierarchical clocking provides the same frequency to all modules, but does not maintain any particular phase. Adaptive synchronizers adapt to the time-varying inter-modular clock and data phases, and out-perform conventional synchronizers." @default.
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- W2295079892 date "2002-11-27" @default.
- W2295079892 modified "2023-10-16" @default.
- W2295079892 title "Adaptive synchronization" @default.
- W2295079892 doi "https://doi.org/10.1109/iccd.1998.727042" @default.
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