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- W2307000987 abstract "In this paper, high-speed Signed-Digit (SD) architectures of binary-to-residue and residue-to-binary conversions for residue number system (RNS) with the moduli set (2n, 2n − 1, 2n + 1) are proposed. The complexity of the conversions and residue arithmetic operations has been greatly reduced by using compact forms for the multiplicative inverse and the fast residur SD addition algorithm. The relationships of the proposed binary-to-residue and residue-to-binary conversions using the residue SD numbers result in simpler hardware requirements for the converters. The primary advantage of our methods is that our conversions and arithmetic operations utilize the modulo m SD adders (MSDAs) only and the proposed basic circuits have high speed structures in a constant delay time." @default.
- W2307000987 created "2016-06-24" @default.
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- W2307000987 date "2015-12-01" @default.
- W2307000987 modified "2023-09-25" @default.
- W2307000987 title "Fast signed-digit arithmetic circuits for residue number systems" @default.
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- W2307000987 doi "https://doi.org/10.1109/icecs.2015.7440319" @default.
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