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- W2313144851 abstract "With the continuous increase in the size and complexity of a real-time computer system, the use of formal verification methods in software development is also on the rise. The traditional formal verification method is not fully applicable to the development of actual system life cycle. Therefore, this paper presents a new real-time system verification method, It take the deadlock timed Bu chi ⋅⋅ automata as the medium, and translate the timed temporal logic into timed communicating sequential process language. The tock event is also joined, which can be directly used for the detection of refinement tool FDR. The method verifies the situation of deadlock. To establish the link between the conventional model checking and refinement model checking can well combine the advantages of both and improve system security and reliability. Keywords; refinement relation; formal verification; real-time system; safety" @default.
- W2313144851 created "2016-06-24" @default.
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- W2313144851 date "2014-12-23" @default.
- W2313144851 modified "2023-10-15" @default.
- W2313144851 title "Model Checking of Real-time System Based on Timed CSP" @default.
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- W2313144851 doi "https://doi.org/10.14257/astl.2014.79.03" @default.
- W2313144851 hasPublicationYear "2014" @default.
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