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- W2315381884 abstract "This work describes the design and measurements of a 60 GHz passive mixer for six-port applications operating and implemented in a 65nm SOI CMOS technology. The mixer topology, consisting only of a n-MOS cold-FET and CPW transmission line matching networks, avoids the use of coupler in front of the detection circuit commonly found in six-port technology. The simplification reduces the chip size and the power consumption. Demodulation results at 60 GHz are demonstrated to validate the approach proposed." @default.
- W2315381884 created "2016-06-24" @default.
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- W2315381884 date "2016-01-01" @default.
- W2315381884 modified "2023-09-25" @default.
- W2315381884 title "65 nm SOI CMOS 60 GHz passive mixer for six-port technology" @default.
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- W2315381884 doi "https://doi.org/10.1109/wisnet.2016.7444320" @default.
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