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• W2323480526 endingPage "04EC08" @default.
• W2323480526 startingPage "04EC08" @default.
• W2323480526 abstract "Abstract Through-silicon-via (TSV) used in three-dimensional (3D) stacked dies must present small electrical parasitic, such as capacitance, to allow for low latency signal transmission. Stable TSV capacitance is desired to overcome the spatial circuit performance variation caused by non-uniform hot-spot heating. In this work, a novel combination of low- k with ultrathin Al 2 O 3 bilayer liner is successfully integrated in the TSV. The TSV capacitance is reduced by ∼26% as compared to plasma-enhanced tetrahydrothosilicate (PETEOS) oxide liner. Stable TSV capacitance within the operating voltage of interest (∼0–5 V) is achieved by operating the TSV in a stable accumulation capacitance region. The positive shift in the flat-band voltage (Δ V FB = +19 V) is achieved by utilizing Al 2 O 3 -induced negative fixed charge (| Q f | = 1.3 × 10 12 cm −2 ) at the Si/low- k interface. Leakage current density of the bilayer liner is improved to a level comparable with the PETEOS oxide liner post annealing [forming gas (N 2 /H 2 ) at 350 °C for 2 h or 400 °C for 0.5 h]. Low- k material with a smaller elastic modulus improves the thermo-mechanical stress exerted on the surrounding Si substrate compared with PETEOS oxide." @default.
• W2323480526 created "2016-06-24" @default.
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• W2323480526 date "2016-03-18" @default.
• W2323480526 modified "2023-09-28" @default.
• W2323480526 title "Novel integration of ultrathin Al2O3with low-kdielectric as bilayer liner for capacitance optimization and stress mitigation in Cu through-silicon-via" @default.
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• W2323480526 doi "https://doi.org/10.7567/jjap.55.04ec08" @default.
• W2323480526 hasPublicationYear "2016" @default.
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