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- W2323626093 abstract "An improved n-channel nonvolatile static RAM is proposed by introducing a new memory cell which consists of a pair of MNOS capacitors and a 6-transistor MOS flipflop circuit. The RAM can be operated as a high speed static memory under a stable power supply, and as a nonvolatile memory by externally applying erasing/writing signals to a common MNOS gate signal line. Self-generation of inhibiting voltage by bootstrapping effect of MNOS capacitors enables this memory to operate with a single power supply of 5 V. Fully decoded 16-bit experimental devices are fabricated and evaluated. This technology shows the possibility to realize a high packing density memory of 4 K-bit or beyond with the access time of less than 100 ns using 3 µm design rule." @default.
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- W2323626093 date "1980-01-01" @default.
- W2323626093 modified "2023-10-18" @default.
- W2323626093 title "N-Channel High Speed Nonvolatile Static RAM Utilizing MNOS Capasitors" @default.
- W2323626093 doi "https://doi.org/10.7567/jjaps.19s1.225" @default.
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