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• W2329040051 abstract "A dynamic Verilog-A resistive random access memory (RRAM) compact model, including cycle-to-cycle variation, is developed for circuit/system explorations. The model not only captures dc and ac behavior, but also includes intrinsic random fluctuations and variations. A methodology to systematically calibrate the model parameters with experiments is presented and illustrated with a broad set of experimental data, including multilayer RRAM. The physical meanings of the various model parameters are discussed. An example of applying the RRAM cell model to a ternary content-addressable-memory (TCAM) macro is provided. Tradeoffs on the design of RRAM devices for the TCAM macro are discussed in the context of the energy consumption and worst case latency of the memory array." @default.
• W2329040051 created "2016-06-24" @default.
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• W2329040051 date "2016-05-01" @default.
• W2329040051 modified "2023-10-16" @default.
• W2329040051 title "A Compact Model for Metal–Oxide Resistive Random Access Memory With Experiment Verification" @default.
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• W2329040051 doi "https://doi.org/10.1109/ted.2016.2545412" @default.
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