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- W2331667811 abstract "This paper is devoted to the design of Quad core crypto processor for executing both Prime field and binary extension field instructions. The proposed design is specifically optimized for Field programmable gate array (FPGA) platform. Combination of two different field (prime field GF(P) and Binary extension field GF(2)) instructions execution is analyzed. Quad core will execute four instruction at a same time. The design is implemented in Spartan 3E , virtex4 and virtex5. The performance results between them are compared. The implementation result shows the execution of parallelism using dual field instructions." @default.
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- W2331667811 date "2013-01-01" @default.
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- W2331667811 title "Quad Core Dual Field Cryptoprocessor on FPGA Platform" @default.
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- W2331667811 doi "https://doi.org/10.9790/4200-0360712" @default.
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