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- W2337549383 abstract "Project verification is an important design stagein c reatingof electronic devices. The state-of-the-art projects ofdigital systems are complex and vast. They demandeffective resources for verification.Simulation is used for the functional and timing projectverification. It is run for error detections on a designstage.Verification methods with simulation are characterizedby heavy timing costs and a sequential execution way ofoperations. A prospective direction is a parallelization ofsimulation algorithms. A high performance and noncomplex parallel or distributed software and hardwarefor simualtiona re actuasc l eintifica nd technciapro l blems.The goal of the research is developing a hardware methodto increase efficiency of distributed event-driven logicsimulation. The tasks of the research include analysis ofan existed hardware acceleration methods and developinga structural implementation of the distributed simulationalgorithm via a specialized processor." @default.
- W2337549383 created "2016-06-24" @default.
- W2337549383 creator A5063236579 @default.
- W2337549383 date "2007-01-01" @default.
- W2337549383 modified "2023-09-27" @default.
- W2337549383 title "HARDWARE METHODS TO INCREASE EFFICIENCY OF ALGORITHMS FOR DISTRIBUTED LOGIC SIMULATION" @default.
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- W2337549383 hasPublicationYear "2007" @default.
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