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- W2337739514 abstract "The novel on-chip network in silicon proven design to support guaranteed traffic permutation in multiprocessor SOC applications. A pipelined circuit-switching Employed in the proposed network with FIFO approach combined with a multistage network topology in dynamic path-setup scheme. The runtime path arrangement enabled by dynamic path-setup scheme for arbitrary traffic permutations along with the Error Correction Block (ECB). The circuit-switching approach offers the permuted data and its compact overhead enables the benefit of stacking multiple networks in system on chip. A CMOS test-chip with 0.13m validates the feasibility and efficiency of the proposed design. The shown experimental result in the proposed on-chip network achieves 1.9x to 8.2x reduction of silicon overhead compared to other design approaches." @default.
- W2337739514 created "2016-06-24" @default.
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- W2337739514 date "2014-01-01" @default.
- W2337739514 modified "2023-09-23" @default.
- W2337739514 title "Design and Implementation of an On-ChipPermutation Network for MultiprocessorSystem-On-Chip" @default.
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