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- W2348777712 abstract "In the process of dynamic partial reconfiguration(DPR) design,from system level design to the field programmble gate array(FPGA) hardware realization,a great deal of register transfer level(RTL) hardware language is needed,which leads to the descending of design efficiency.Aiming at this problem,this paper applies the System Generator software to present a kind of design method of dynamic partial reconfiguration(DPR) based on the latest DPR design process——early-access partial reconfiguration from Xilinx Co..This method cuts off most of the manual hardware language,which makes the design process simple and improves the design efficiency in a certain degree." @default.
- W2348777712 created "2016-06-24" @default.
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- W2348777712 date "2011-01-01" @default.
- W2348777712 modified "2023-09-26" @default.
- W2348777712 title "Method of Dynamic Partial Reconfiguration Design Based on System Generator" @default.
- W2348777712 hasPublicationYear "2011" @default.
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