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- W2350984896 abstract "This paper analyzed a serializer structure in two-stage cascade MUX including a tree structure and two serial structures to achieve the 10∶1 multiplexing at the bit rate of 1.25 Gbps. This IC uses high speed units but operates at the half speed of the bit rate to improve the design efficiency and to realize low power consumption. It has been developed using 0.35 μm CMOS technology and the layout was designed in full custom method. The chip was realized through a foundry technology and measured on wafer. The chip size is 24.19 mm 2 and consumes 174.84 mW under a 3.3 V supply. The measured voltage is 2.42 V p-p based on 50 Ω load, the duty cycle is 49% and the phase jitter is 35 ps rms at the 1.25 Gbps standard bit rate. The highest speed of serial data is 1.62 Gbps." @default.
- W2350984896 created "2016-06-24" @default.
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- W2350984896 date "2003-01-01" @default.
- W2350984896 modified "2023-09-26" @default.
- W2350984896 title "1.25 Gbps Serializer CMOS IC" @default.
- W2350984896 hasPublicationYear "2003" @default.
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