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- W2352539019 abstract "A simple PLL is designed in this paper for the nonbalanced modulation technology which is often used in the satellite communication system. At first we analysis the performance of this PLL in theory, then prove the chosen loop parameters to be correct through software simulation, at last realize the algorithm on FPGA. The nonbalanced modulation receiver adopts this algorithm reaches the performance target in the final test, which also prove this PLL to be valid." @default.
- W2352539019 created "2016-06-24" @default.
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- W2352539019 date "2004-01-01" @default.
- W2352539019 modified "2023-09-22" @default.
- W2352539019 title "PLL Design in Digital Receiver for Nonbalanced BPSK Modulation and Realize on FPGA" @default.
- W2352539019 hasPublicationYear "2004" @default.
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