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- W2354481791 abstract "High peak power makes power distribution network suffer from great instantaneous current and severe electro-migration, resulting in lower chip's reliability and performance. Thus, it's very important to effectively estimate an accurate peak power dissipation of a circuit. In order to obtain an efficient estimation of least bound of the peak dissipation of a VLSI chip, a novel approach is proposed in this paper. Experiments with the ISCAS85 benchmarks demonstrate that this approach is time-saving and can give more accurate estimation of peak power not only for the delay-free model, but also for the delay model of maximum power of CMOS circuits." @default.
- W2354481791 created "2016-06-24" @default.
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- W2354481791 date "2001-01-01" @default.
- W2354481791 modified "2023-09-25" @default.
- W2354481791 title "A NOVEL ATPG APPROACH TO MAXIMUM POWER ESTIMATION OF CMOS CIRCUITS" @default.
- W2354481791 hasPublicationYear "2001" @default.
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