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- W2355033687 abstract "Thermal resistance is a key parameter to estimate the junction temperature and reliability of the power device.The solder layer voids inevitably left by the die attach process have much effects on the thermal performance of the device.In this study,finite element analysis(FEA) by Ansys Workbench was carried out to precisely model the solder layer with various voids configurations in TO3P package.The results show that for equivalent voiding percentage,thermal resistance increases more for large coalesced void in comparison to the small distributed voids.In addition,the voids extending through the entire thickness of solder layer and voids formed between the chip and solder layer can significantly increase the thermal resistance and junction temperature.Large voids at the edge of solder layer contribute more rise of thermal resistance than that distributed on the other area of the layer." @default.
- W2355033687 created "2016-06-24" @default.
- W2355033687 creator A5031078607 @default.
- W2355033687 date "2013-01-01" @default.
- W2355033687 modified "2023-09-25" @default.
- W2355033687 title "Effect of Solder Layer Voids on the Thermal Resistance of Power Device Package" @default.
- W2355033687 hasPublicationYear "2013" @default.
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