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- W2361808105 abstract "The error correcting technology is indispensable in modern communication system.In this paper,in order to meet the high reconfigurable requirement of current error correcting test,a new error correcting codes(ECC)test platform was proposed based on the layer principle and the hardware-software co-design.The layering design construction enables the platform of high reconfiguration ability,which reconfigures quickly between the different ECC.In order to ensure the high-speed,ordinal and error-free data transmission,high-speed PCI data collection card PCI-7300A was used to transmit data between PC and FPGA,and the data was packaged layeredly and the parity bit and confirm-retransmission mechanism was added between port of PC and FPGA.Through the testing of non-binary LDPC by using this platform,the results show that the throughput of the platform reach to 446.83 Mbps when the transmit clock is 20 MHz." @default.
- W2361808105 created "2016-06-24" @default.
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- W2361808105 date "2010-01-01" @default.
- W2361808105 modified "2023-09-25" @default.
- W2361808105 title "ECC testing platform based on layering principle" @default.
- W2361808105 hasPublicationYear "2010" @default.
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