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- W2362486247 abstract "Using the carry-select adder scheme, an adder with small number of stages can be operated as fast as an adder with large number of stages. In this paper, a 4-block 5-stage 32-bit pipelined carry-select adder is designed and implemented. The proposed adder operates as fast as a conventional 16-stage 32-bit pipelined adder while the number of registers required is nearly same as a conventional 4-stage pipelined adder. This adder is operated at 1.67GHz clock frequency in a standard 0.25um CMOS technology with 2.5 V supply voltage." @default.
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- W2362486247 date "2002-01-01" @default.
- W2362486247 modified "2023-09-28" @default.
- W2362486247 title "A 32-bit Pipelined Carry-select Adder Using the Complementary Scheme" @default.
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