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- W2363665718 abstract "The high-speed ADC requires more and more quality of clock.The authors presented a kind of low-jitterclock AD9516-3,which is designed based on synchronization regulator and jitter eliminator. The authors also analyzed the impact of clock jitter on SNR,and presented the design and application of AD9516-3 in IF digital receiver. A new test method of Signal Tap was introduced to test the quality of the clock. The test shows that the overall target meets the design requirements." @default.
- W2363665718 created "2016-06-24" @default.
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- W2363665718 date "2009-01-01" @default.
- W2363665718 modified "2023-09-27" @default.
- W2363665718 title "The design of clock AD9516-3 and the application in IF digital systems" @default.
- W2363665718 hasPublicationYear "2009" @default.
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