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- W2364691331 abstract "A verification platform's design of network processor based on systemverilog is presented in this paper.The platform is based on VMM,relational modules and the code of functional coverage are accomplished by SystemVerilog.Meanwhile,some SVA is inserted in designing code.When the network processor is running,from verification platform,the error can be discovered quickly and the verification of function can be achieved availably." @default.
- W2364691331 created "2016-06-24" @default.
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- W2364691331 date "2011-01-01" @default.
- W2364691331 modified "2023-09-23" @default.
- W2364691331 title "Verification Platform's Design of Network Processor Based on SystemVerilog" @default.
- W2364691331 hasPublicationYear "2011" @default.
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