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- W2364974766 abstract "To reduce testing time of electronic applications using System on Chip(SoC) design,an optimal bus assignment scheme based on genetic algorithm was presented for SoC test scheduling.A genetic algorithm model for optimal test scheduling was constructed.To make the solution process more stable and the results nearer to global optimal solution,differential evolution,elitism approach and self-adaptive mutation were introduced to the traditional genetic algorithm.The approach provided more optimal test time clock cycles,comparable to the Integer Linear Programming(ILP) formulation of similar problems,the comparison results indicated that this approach was more appropriate to test the large-scale SoC." @default.
- W2364974766 created "2016-06-24" @default.
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- W2364974766 date "2006-01-01" @default.
- W2364974766 modified "2023-09-25" @default.
- W2364974766 title "Optimal bus assignment scheme for system on chip test scheduling" @default.
- W2364974766 hasPublicationYear "2006" @default.
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