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- W2365797382 abstract "Fast Fourier Transform(FFT) is one of the cores for the OFDM system.This design adopts RAG(Reduced Adder Graph) algorithm with pipeline pattern to construct a FFT hardware processor with practicbiality.Simulation indicates that by timing and hardware,the design can reduce the number of adders in FFT by 30% while improve the processing speed,and is more flexible for modulation and demodulation of mass data in the OFDM system." @default.
- W2365797382 created "2016-06-24" @default.
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- W2365797382 date "2007-01-01" @default.
- W2365797382 modified "2023-09-28" @default.
- W2365797382 title "FPGA Implementation Based on RAG Algorithm of OFDM System" @default.
- W2365797382 hasPublicationYear "2007" @default.
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