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- W2368674508 abstract "In this paper we propose a new low-leakage FPGA Look-up Tables (LUTs) that can operate in three different modes: high-speed, low-power or sleep. In High-speed mode, the LUTs provide similar power and performance to a conventional LUT. In low-power mode, as the expense of speed, leakage power is reduced by 68%~73% vs. high-speed mode. Leakage power in sleep mode is over 95% lower than in high-speed mode." @default.
- W2368674508 created "2016-06-24" @default.
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- W2368674508 date "2007-01-01" @default.
- W2368674508 modified "2023-09-23" @default.
- W2368674508 title "A Novel Low-Leakage Look-Up Table for FPGAs" @default.
- W2368674508 hasPublicationYear "2007" @default.
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