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- W2370763743 abstract "According to the complexity of hardware structure,the poor human-computer interaction and low portability in designing a high frequency signal generator by MCU and DDS chip,a direct digital frequency synthesis(DDS) IP soft-core which has a function of high-frequency signal generator is designed.In order to improve the human-computer interaction,we convert decimal to binary by the method of weighted,and use streamlined algorithm to create the frequency control word so that we can solve the complexity of hardware structure in the traditional way.Meanwhile,Verilog HDL hardware desiption language is applied to realize the DDS behavior description and achieve an overloaded DDS IP core on the ISE platform.At last,the board-level verification of the IP core is developed on the XILINX SEED XDTK V5 platform.It is demonstrated experimentally that the IP core can satisfy the practical application with a good human-computer interaction and high portability." @default.
- W2370763743 created "2016-06-24" @default.
- W2370763743 creator A5069958491 @default.
- W2370763743 date "2013-01-01" @default.
- W2370763743 modified "2023-09-23" @default.
- W2370763743 title "Research on DDS IP Core Based on FPGA" @default.
- W2370763743 hasPublicationYear "2013" @default.
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