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- W2371354080 abstract "This paper presents a sample /hold circuit,which includes a high linearity MOS switch. Through the opamp sharing used in the sample / hold circuit,it can introduce a feedback voltage to the gate of the sampling switch during its sampling phase,and the feedback voltage can remarkably reduce the non-linearity introduced by on-resistance of the sampling switch. Therefore it can achieve a high performance sample / hold circuit. Based on SMIC 0. 13μm standard CMOS process,the sample/hold circuit is designed,and simulation results show that at sampling phase,the on-resistance of the sampling switch is only 0. 2 Ω variation; and at the 80 Msample / s sample rate,30 MHz and 0. 5V pp input signal,simulation results show that the spurious free dynamic range( SFDR) achieve116 dB,which is about 34 dB over the conventional switch." @default.
- W2371354080 created "2016-06-24" @default.
- W2371354080 creator A5081429904 @default.
- W2371354080 date "2013-01-01" @default.
- W2371354080 modified "2023-09-26" @default.
- W2371354080 title "A Sampling and Hold Circuit with High Linearity MOS Switch" @default.
- W2371354080 hasPublicationYear "2013" @default.
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