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- W2371640802 abstract "A new method for designing fault-tolerant digital circuits to reduce the failure rate of nanoscale circuits based on interwoven redundancy and the asymmetric of two kinds of binary errors,using a modular approach to design circuits.With multiplier as an example,this paper conducted a simulation experiment using the new method.The results show that it is better than the traditional fault-tolerant design methods.The new method is especially suitable for nano-circuits because it won't increase the system delay without detection module and voter,and its resource consumption is far less than that of traditional methods." @default.
- W2371640802 created "2016-06-24" @default.
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- W2371640802 date "2010-01-01" @default.
- W2371640802 modified "2023-09-24" @default.
- W2371640802 title "Research on Fault-tolerant Techniques Based on Interwoven Redundancy for Nanoscale Circuits" @default.
- W2371640802 hasPublicationYear "2010" @default.
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