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W2374483501 abstract "The Golomb codes have been widely used in many fields such as video and image process,test-data compression.In this paper,an efficient Golomb decoder architecture has been designed,which is suitable for implementation.We also accomplish the hardware implementation of the decoder circuit.The architecture of the decoder is composed of finite-state machine(FSM) module and counter module.We reduce the state number of the finite-state machine by optimizing it.The synthesis result shows that the areas of the decoder are about 120 gates and the critical path delays are 0.7ns.This design is scalable and can meet the requirement of high working frequency.In addition,the hardware overhead of the decoder is very small and the design can become independent IP core." @default.
W2374483501 created "2016-06-24" @default.
W2374483501 creator A5011673866 @default.
W2374483501 date "2007-01-01" @default.
W2374483501 modified "2023-09-23" @default.
W2374483501 title "Architecture Design and Hardware Implementation for Golomb Decoder" @default.
W2374483501 hasPublicationYear "2007" @default.
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