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- W2376792648 abstract "With the development of Internet and the advancement application technology,more and more business needs real-time and fast packet classification.The design of system on programmable chip(SOPC) is a new and vital aspect for the research of embedded system designing.Characters and development trend of programmable logical device(PLD) were elaborated.On this basis,the intellectual property(IP)reuse methodology and the technique for designing softwareand hardwareinSOPC based onembedded processor core and Xilinx FPGA werediscussed.Technology of Internet reconfigurable logic(IRL) was introduced.The design and implementation of IRL were also presented." @default.
- W2376792648 created "2016-06-24" @default.
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- W2376792648 date "2006-01-01" @default.
- W2376792648 modified "2023-09-26" @default.
- W2376792648 title "Research on packet classification based on FPGA" @default.
- W2376792648 hasPublicationYear "2006" @default.
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