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- W2377692012 abstract "In this paper,with some practical details,introduce an optimized logic design mrthod by a combination of data selector and decoders,which can greatly reduces the frequencies of using the chips of the data selectors and gate circuits." @default.
- W2377692012 created "2016-06-24" @default.
- W2377692012 creator A5061553015 @default.
- W2377692012 date "2004-01-01" @default.
- W2377692012 modified "2023-09-27" @default.
- W2377692012 title "An Optimized Logic Design Methed Of Using a Combination Of Data Selectors and Decoders" @default.
- W2377692012 hasPublicationYear "2004" @default.
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