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- W2384124522 abstract "The large magnitude low frequency jitter from SDH pointer adjustments are difficult to be reduced using ordinary methods such as general analog or digital phase locked loops. A novel digital desynchronizer technique was developed to regenerate the 2.048 MHz clock in the SDH equipment. By counting the difference between the write clock and a reference clock, the speed of the read clock can be forecasted. The operating principles, the jitter performance analysis and experiment results are given to show that the recovered clock has little output jitter and this technique has better jitter transfer characteristics and a wider catching range. Moreover, this technique is completely digital and can be integrated." @default.
- W2384124522 created "2016-06-24" @default.
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- W2384124522 date "2000-01-01" @default.
- W2384124522 modified "2023-09-26" @default.
- W2384124522 title "Counting forecast and regeneration of the 2.048MHz clock in the SDH equipment" @default.
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