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- W2387627092 abstract "With analysis PC/104 Bus timing diagram,design state machine.Then finish interface design to PC/104 Bus with CPLD in Maxplus-II.And realize normal data transportation and address decode on PC/104 Bus." @default.
- W2387627092 created "2016-06-24" @default.
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- W2387627092 date "2005-01-01" @default.
- W2387627092 modified "2023-09-23" @default.
- W2387627092 title "An Interface Design For PC/104 Bus with CPLD" @default.
- W2387627092 hasPublicationYear "2005" @default.
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