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• W2389322023 abstract "A new sensing architecture aiming at negative threshold voltage detection for 3D NAND Flash memory cells is proposed. This sensing architecture does not need triple well devices and negative voltage supplies. In this architecture, we apply 2 V to source line (SL) rather than 0V which is always used in conventional method. We prove that this architecture is feasible by Technology Computer Aided Design (TCAD) simulation. We have also designed a sense amplifier (SA) to support the proposed sensing architecture. This SA has advantages including lower noise, 9.4% faster read speed, and 51.6% lower power consumption compared to the conventional counterpart." @default.
• W2389322023 created "2016-06-24" @default.
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• W2389322023 date "2016-03-01" @default.
• W2389322023 modified "2023-09-25" @default.
• W2389322023 title "A high speed low power negative sensing architecture for 3D NAND Flash memory" @default.
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• W2389322023 doi "https://doi.org/10.1109/cstic.2016.7463923" @default.
• W2389322023 hasPublicationYear "2016" @default.
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