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- W2390936618 abstract "An optical receiver front-end circuit suitable for optical connect system was designed in a SMIC 0.18μm CMOS process.The transimpedance amplifier(TIA) and limiting amplifier(LA) are integrated in one chip.TIA uses regulated cascade(RGC) to boost bandwidth.LA uses second-order active feedback architecture and active inductor loads to improve the gain-bandwidth product(GBW).The circuit provides an overall gain of 85dB with a bandwidth of 4.36 GHz.The chip dissipates 144mW from a 1.8V supply with its area of 1.0×0.7mm2." @default.
- W2390936618 created "2016-06-24" @default.
- W2390936618 creator A5072936185 @default.
- W2390936618 date "2011-01-01" @default.
- W2390936618 modified "2023-09-23" @default.
- W2390936618 title "Design of Monothic CMOS Optical Receiver Front-End Circuit" @default.
- W2390936618 hasPublicationYear "2011" @default.
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