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- W2391104411 abstract "A high speed real-time data acquisition system based on a FPGA is designed in this paper.This system combines three functions of the channel selection to control and gain setting,A/D switching control,and the data buffering asynchronous FIFO by using a FPGA as the controller of a data acquisition system.The channel choosing and gain setting of a programmable gain amplifier could be realized through the software programming controlling hardware by using the Verilog HDL language.A 16-bit FIFO is designed to accomplish the data buffering memory using the internal RAM in a FPGA.The plan of synchronized acquisition and the real-time read data based on FPGA improves the system speed of data acquisition and the transmission.The simulation results show that the designed high speed real-time data acquisition system has good functions." @default.
- W2391104411 created "2016-06-24" @default.
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- W2391104411 date "2009-01-01" @default.
- W2391104411 modified "2023-09-28" @default.
- W2391104411 title "Design of High Speed Real-time Data Acquisition System Based on FPGA" @default.
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