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- W2391609987 abstract "A single-loop high-order double-sampling ΣΔ modulator architecture for broadband applications was proposed.The architecture employs the technique of double-sampling,and can double the oversampling ratio of the ΣΔ modulator without increasing the clock frequency.A new simple circuit was proposed,and the circuit can realize the zero at the half of the sampling frequency in the noise transfer function.The proposed architecture can easily implement the optimized noise transfer function and signal transfer function of the modulator.A system model was built and simulated by SIMULINK.Simulation results show that the ΣΔ modulator architecture can degrade the folded noise caused by the mismatch of sampling capacitance and improve the modulator's performance." @default.
- W2391609987 created "2016-06-24" @default.
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- W2391609987 date "2009-01-01" @default.
- W2391609987 modified "2023-09-24" @default.
- W2391609987 title "Double-Sampling ΣΔ Modulator Architecture for Broadband Applications and System Simulation" @default.
- W2391609987 hasPublicationYear "2009" @default.
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