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- W2398019970 abstract "This paper presents a digital Active Gate Drive (AGD) methodology for power semiconductor devices. The inherent latency limitation of digital signal processing systems is addressed by a sequential optimization procedure that uses voltage and current signals recorded at the previous switching edge to develop an optimized gate drive waveform for the next switching edge. Experimental results using a half-bridge circuit operating at 180 V/100 A show that the proposed scheme is capable of minimizing switching losses whilst constraining the overvoltage peaks occurring at turn-on and turn-off to as low as 200 V and 300 V respectively." @default.
- W2398019970 created "2016-06-24" @default.
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- W2398019970 date "2016-03-01" @default.
- W2398019970 modified "2023-10-06" @default.
- W2398019970 title "Digital Active Gate Drives using sequential optimization" @default.
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- W2398019970 doi "https://doi.org/10.1109/apec.2016.7468088" @default.
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