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- W242777974 abstract "The development of integrated circuit technology seen in the last decades has enabled a large variety of battery operated equipment to emerge, such as smallsensors and medical implants. These applications often has low requirements on sampling frequency but require a very low power consumption to achieve a longbattery life. This thesis investigates one aspect of implementing a low power and low frequency analog to digital converter (ADC) using a technique called Sigma Delta-modulation.The Sigma Delta-ADC uses few analog components but instead it requires a digital filter to extract the wanted resolution. It is this filter which is under investigation in this work. To investigate the power consumption under the presumption that the filter would be a custom circuit implemented on-chip, a simplistic approach has been taken. Based on a high-level algorithmic investigation and the fact that it is popularly used together with Sigma Delta-modulators the Cascaded Integrator Comb (CIC) filter was chosen for implementation. The CIC-filter uses only adders and delay elements which is a great advantage when aiming at a low power consumption. The drawback is that this filter has a poor passband which can introduce distortion within the signal band. Using the Spectre simulator provided in the Cadence Virtuoso suite the lowest power consumption achieved was 16 nW, extracting 80 % of the theoretically available resolution." @default.
- W242777974 created "2016-06-24" @default.
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- W242777974 date "2009-01-01" @default.
- W242777974 modified "2023-09-27" @default.
- W242777974 title "Power Efficient Digital Decimation Filters for Sigma-Delta ADCs" @default.
- W242777974 hasPublicationYear "2009" @default.
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