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W2466228052 abstract "A sub-0.5e rms - temporal read noise VGA (640H×480V) CMOS image sensor has been integrated in a standard 0.18 μm 4PM CMOS process. The low noise performance is achieved exclusively through circuit optimization without any process refinements. The presented imager relies on a 4T pixel of 6.5 μm pitch with a properly sized and biased thin oxide PMOS source follower. A full characterization of the proposed image sensor, at room temperature, is presented. With a pixel bias of 1.5 μA the sensor chip features an input-referred noise histogram from 0.25 e rms - to a few e rms - peaking at 0.48 e rms - . The imager features a full well capacity of 6400 e - and its frame rate can go up to 80 fps. It also features a fixed pattern noise as low as 0.77%, a lag of 0.1% and a dark current of 5.6 e - /s. It is also shown that the implementation of the in-pixel n-well does not impact the quantum efficiency of the pinned photo-diode." @default.
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W2466228052 date "2016-09-01" @default.
W2466228052 modified "2023-10-18" @default.
W2466228052 title "A Sub-0.5 Electron Read Noise VGA Image Sensor in a Standard CMOS Process" @default.
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W2466228052 doi "https://doi.org/10.1109/jssc.2016.2579643" @default.
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