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- W2467511775 abstract "Abstract Parallel Prefix Radix 2 8 bit Comparators using Constant Delay (CD) logic is presented in this paper. The constant delay logic pre discharges the output to zero logic and switches to a logic one through a critical path clocked PMOS transistor. CD logic operation is much faster than a dynamic logic circuit during its D-Q mode of operation. The comparator's architecture consists of two stages; where the first stage uses a pass transistor pre encoding circuitry for achieving low power consumption and the second stage employs a high performance dynamic-CD-static logic manner combination comparators. Design and simulation were carried out in Mentor Graphics ELDO Simulator using 180 nm technology." @default.
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- W2467511775 date "2016-01-01" @default.
- W2467511775 modified "2023-09-26" @default.
- W2467511775 title "Design and Analysis of 8 Bit Parallel Prefix Comparators Using Constant Delay Logic" @default.
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- W2467511775 doi "https://doi.org/10.1016/j.protcy.2016.05.074" @default.
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