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• W2476831239 abstract "A 256/spl times/256 passive pixel imager has been implemented in a CMOS 0.6-/spl mu/m technology. A column-parallel differential architecture with a correlated double-sampling output circuit removes the smear-like effects of a parasitic current that plagues passive pixels, 0.1% pixel-to-pixel and 0.4% column-to-column fixed-pattern noise are achieved." @default.
• W2476831239 created "2016-08-23" @default.
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• W2476831239 date "2000-12-01" @default.
• W2476831239 modified "2023-09-26" @default.
• W2476831239 title "A 256/spl times/256 CMOS differential passive pixel imager with FPN reduction techniques" @default.
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• W2476831239 doi "https://doi.org/10.1109/4.890319" @default.
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