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- W2485245095 abstract "Register file is the paramount aspect in computer memory unit. Eight bits (one memory unit) results in a single register and 32 of such register make up a register file. In this paper w e have presented the design of a complete register file using reversible logic design. It consists of decoder, multiplexer, memory unit, read and write units. This has been verified using VHDL. In addition to that, we have implemented the register file in the design of Content Addressable Memory (CAM) as an application." @default.
- W2485245095 created "2016-08-23" @default.
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- W2485245095 date "2016-03-01" @default.
- W2485245095 modified "2023-09-27" @default.
- W2485245095 title "Design of register file using reversible logic" @default.
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- W2485245095 doi "https://doi.org/10.1109/iccpct.2016.7530280" @default.
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