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- W2488129218 abstract "Publisher Summary Electronic system level (ESL) is a design abstraction that enables ease of design capture and early design space exploration of multiple design implementation alternatives. ESL designs can be refined into lower levels of abstraction through a number of steps that gradually map abstract functions into register-transfer level (RTL) components, which is the next level of design abstraction. The main drivers and the basic elements of the emerging ESL design method are discussed in this chapter. An enabling technology for ESL design is high-level synthesis (HLS), also known as behavioral synthesis. A high-level synthesis tool bridges the gap between an algorithmic description of a design and its structural implementation at the register transfer level, and is the next natural step in design automation, succeeding logic synthesis. HLS in the context of an ESL design method, its generic structure, and the basic tasks accomplished by it are described in the chapter. This is followed by a detailed description of the key HLS algorithms and exercises designed to reinforce understanding. By the end of the chapter, the reader is exposed to the basic principles of HLS and its applicability in an ESL design flow." @default.
- W2488129218 created "2016-08-23" @default.
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- W2488129218 date "2009-01-01" @default.
- W2488129218 modified "2023-10-14" @default.
- W2488129218 title "Electronic system-level design and high-level synthesis" @default.
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- W2488129218 doi "https://doi.org/10.1016/b978-0-12-374364-0.50012-6" @default.
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