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- W2503409110 abstract "The initiation to have a concept of shared memory in processors has built an opportunity for thread level parallelism. In various applications, synchronization or ordering tools are utilized to have an access to shared data. Traditionally, multithreaded programming models usually suggest a set of low-level primitives, such as locks, to guarantee mutual exclusion. Possession of one or more locks protects access to shared data. But, due to some flaws they become a suboptimal solution. The idea of transactional memory is in research presently as an alternative to locks. Among which, one way is hardware transactional memory. Atomicity is well supported by using transactions in hardware. In this chapter, we have focused on hardware transactional memories and the work done on them so far." @default.
- W2503409110 created "2016-08-23" @default.
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- W2503409110 date "2016-01-01" @default.
- W2503409110 modified "2023-09-27" @default.
- W2503409110 title "Hardware Transactional Memories" @default.
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- W2503409110 doi "https://doi.org/10.4018/978-1-5225-0287-6.ch003" @default.
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