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- W2508598898 abstract "This paper proposes the design of an adaptive filterin stochastic circuits. The proposed circuit requires lower areaand power than a conventional stochastic implementation. In theproposed design, the stochastic multiplier is implemented by anXNOR gate, as in a conventional scheme. However, the stochasticadder based on a multiplexer is not a very efficient implementationdue to the three required stochastic number generators(SNGs) and the iterative operation required in the adaptivefilter. Thus, a novel stochastic adder using a counter and a postprocessing unit is proposed. This adder avoids the use of SNGs, therefore it incurs a smaller area and power, while operatingfaster than the conventional (multiplexer-based) stochastic adder. In terms of accuracy and hardware efficiency, simulation resultsshow that the adaptive filter using the proposed stochastic designoutperforms the conventional stochastic implementation usinglinear feedback shift register (LFSR) based SNGs. Specifically, the proposed design consumes 35.81% less dynamic power and21.34% less area than an LFSR-based implementation at aslightly higher accuracy." @default.
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- W2508598898 date "2016-07-01" @default.
- W2508598898 modified "2023-09-27" @default.
- W2508598898 title "Adaptive Filter Design Using Stochastic Circuits" @default.
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- W2508598898 doi "https://doi.org/10.1109/isvlsi.2016.132" @default.
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