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- W2509523906 abstract "This paper proposes a buffered dual-access mode cache to reduce power consumption in multicore embedded systems. This cache is called as Buffer-Controlled Cache (BCC). The proposed cache includes a pre-cache buffer to determine how to access the cache in two different ways. The BCC scheme shows better prediction rates and lower power consumption than other popular low-power caches, such as Phased cache and Way-prediction cache. We have used Multi2Sim and McPAT simulators to evaluate various cache systems by using the multicore-oriented Parsec benchmark programs. Our experimental results show that the proposed cache scheme improves the power consumption by 54% over the other popular cache scheme, such as Way-prediction cache." @default.
- W2509523906 created "2016-09-16" @default.
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- W2509523906 date "2016-07-01" @default.
- W2509523906 modified "2023-09-27" @default.
- W2509523906 title "Buffer-controlled cache for low-power multicore systems" @default.
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- W2509523906 doi "https://doi.org/10.1109/cce.2016.7562627" @default.
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